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抗辐照4k×32bit sram的研分究与设计
摘要6管单元的SRAM,在130nm标准CMOS工艺下的£砜约为IOMeV·cm2/mg,
摘要
6管单元的SRAM,在130nm标准CMOS工艺下的£砜约为IOMeV·cm2/mg,
基于DICE结构所设计的SRAM在抗辐照能力上有显著的提高。 关键词:SRAM抗辐照DICE位线及字线分割技术高速低功耗单粒子效应
Ⅱ
ABSTRACTAB
ABSTRACT
AB STRACT
SRAM is the main product of very large scale integrated circuit,it has been widely used in hi911ly fast speed systems due to its low power dissipation and high speed.As the developing of the the aeronautical and astronautical technology,SRAM is being more and more used in the control systems of spacecrafls and satellites.Because of the complicatedly radiant environment of the air space,besides the low power dissipation and fast speed,SRAM should have the ability of radiation—hardened.
This thesis analysises the standard storage cell of SRAM based on the structrue of 6
transistors,then introduces the principle of single event effect of CMOS devices.This thesis design the storage cell of SRAM based on the structure of dual interlocked storage cell(DICE),who has four redundant nodes,to improve its ability of
radiation.hardened.And the application of hierarchical divided bit-line and word—line (HDBWL)approach is used for reducing the power dissipation of SRAM,at the same time improving its working speed.,because the structrue of the storage cell of SRAM is
hard to change as it has been fixed.The arbitrated module is used to control the state of
affairs of reading or writing the same storage cell of SRAM with double ports.And this design was finished with the technology of 1 30 CMOS.
The tests of SRAM includes the function test,the analysis of power dissipation and
the test of the ability of radiation.hardened.The mixed—mode simulation of NanoSim and building the test setting with Spectre has been used to test the function respectively. And NanoSim also Can analysis the SRAM’S power dissipation.
Single event effects are the events that occur as a result of a high energy particle striking a semiconductor device.As the particle transverses through the device,it transfers energy to the
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