基于Verilog的AES加密算法的实现毕业设计论文.doc

东南大学本科生毕业设计（论文） PAGE PAGE I 基于VERILOG的AES加密算法的实现 摘要： 随着信息产业在我国国民经济中扮演越来越重要的角色，信息技术的发展和数据传输的安全性受到了有关部门的重视，加强网络信息安全的加密产品具有广泛的应用前景。此课题主要研究了基于VERILOG硬件描述语言的AES加密算法原理及优化，以及设计硬件实现。 本文先介绍了先进加密算法(AES)的原理，同时讲述了其与Rijndael设计的异同。安全，高效，易拓展优化，硬件实现简单是其的特点，同时，本文还研究了算法实现的关键技术。在设计过程中，完成了整体结构的规划和各部分的端口的定义，用VERILOG语言完成了电路的RTL级的描述，同时使用了Model公司的Modelsim仿真工具进行了软件平台 上的仿真，实现了128位比特密钥的加密解密的逻辑功能，硬件上使用了基于Xilinx公司的VIRTEX系列芯片，并用Synplify软件进行了FPGA综合，仿真基本达到了要求，这也证明了设计的正确性。在设计中尤其要提到的是本文采用了ECB（电子密码本）加密算法模式，采用流水线结构，提高了电路的工作频率和速度，本设计的创新点在于用语言实现S盒变换时，并没有采用传统的查表方式，而是直接采用了算法描述，相较之下，节省了电路的存储面积，实现了优化。 关键字： Verilog, AES，先进加密标准，Rijndael设计，FPGA，加密，高速，流水线结构 The implement of AES encrypt arithmetic base on Verilog HDL Yuhuan Supervised by Zheng Lixia Abstract： With the information industry plays more important role in the country economy, the development of communication technique and security of data transfer is taken serious by some government department. The encrypt product which is used to strengthen net information security has extensive foreground. This subject mainly investigate AES encrypt arithmetic principium and its upgrade, then offer the design of hardware implement. This subject introduce the principium of AES arithmetic first, at the same time, it gives the similarities and differences. The AES arithmetic contains following characteristic: security, high efficiency, easy optimized, easy progress of hardware implement. The subject introduces the pivotal technique of the implement and attentions at the same time. Within the process of designing, I complete the programming of whole configuration and the defining of port of each part, complete the RTL description of circuit with Verilog HDL. And I complete the emulation which is based on software with Modelsim which is the product of Model Co. It achieves the logic function of 128 bit key. I use the CMOS chip of Virtex series which comes from Xilinx