2.集成电路CAD-MOS工艺.pptVIP

1 * dual-well approach uses both n- and p- wells grown on top of a epitaxial layer(using trench isolation areas of SiO2) 1 * 13 13 13 13 13 13 13 13 13 8 1 * 14 14 14 14 14 14 14 14 14 1 * 15 15 15 15 15 15 15 15 15 9 1 * 17 17 17 17 17 17 17 17 17 11 1 * 18 18 18 18 18 18 18 18 18 12 1 * 19 19 19 19 19 19 19 19 19 1 * 20 20 20 20 20 20 20 20 20 13 1 * Polysilicon gate is patterned before source and drain are created – thereby actually defining the precise location of the channel region and the locations of the source and drain regions. This allows for very precise positioning of the source a