液晶显示驱动.pptVIP

基于MIPI-DPI规范的液晶显示驱动接口设计 TFT-LCD驱动原理 MIPI_DPI_specification Display Pixel Interface Interoperability Power Supply Connections and Interface Signals Programmable Timing Parameters DPI Timing Parameter Examples Shutdown for Type 4 Architecture Color Mode for Type 4 Architecture 设计与仿真 * * TFT-LCD驱动原理 MIPI_DP_specification 设计与仿真 TFT-LCD结构示意图 TFT-LCD显示驱动原理 TFT-LCD矩阵结构 Display Architectures and Interface Constructions There are two types of electrical connections between the host processor and the display module. ? Power Signals. Power is supplied from either the host processor or from a power management unit that is controlled by the host processor. ? Interface Signals. Pixel data, commands, and control information are transferred between the host processor and display module using the interface signals. The host processor interface shall implement a 24-bit data width and accompanying control and timing signals, as specified in section 6. The host processor interface shall be capable of transferring data as 16-bit, 18-bit, or 24-bit words. DPI Interface Signals and Power Connections The host processor shall support all control signals for Type 2, Type 3, and Type 4 display architectures as shown in Figure 5. SD and CM are required control signals for Type 4 compliant display modules only. Host processors shall support all timing parameter sets described in section 10. If a display module supports a display resolution in section 10 then it shall support the timing parameters as described for that resolution. Both the host processor and display module may operate over a range of values that include the given timing parameters. Interface Electrical Characteristics 本设计基于QuartusII的FPGA设计工具通过编写verilog HDL程序实现DPI接口功能