新型晶体管同或异或门电压控制环振荡器设计外文+文献翻译.docVIP

机械与电气工程学院 毕业设计（论文）外文翻译 所在学院： 机电学院 班 级： 姓 名： 学 号： 指导教师： 合作导师： 2013 年 10 Voltage Controlled Ring Oscillator Design with Novel 3 Transistors XNOR/XOR Gates Manoj Kumar1, Sandeep Kumar Arya1, Sujata Pandey2 1Department of Electronics Communication Engineering Guru Jambheshwar, University of Science Technology, Hisar, India 2Department of Electronics Communication Engineering, Amity University, Noida E-mail: manojtaleja@gjust.org Received April 14, 2011; revised May 6, 2011; accepted May 13, 2011 Abstract In present work, improved designs for voltage controlled ring oscillators (VCO) using three transistors XNOR/XOR gates have been presented. Supply voltage has been varied from [1.8 - 1.2] V in proposed de-signs. In first method, the VCO design using three XNOR delay cells shows frequency variation of [1.900 - 0.964] GHz with [279.429 - 16.515] μW power consumption variation. VCO designed with five XNOR de-lay cells shows frequency variation of [1.152 - 0.575] GHz with varying power consumption of [465.715 - 27.526] μW. In the second method VCO having three XOR stages shows frequency variation [1.9176 - 1.029] GHz with power consumption variation from [296.393 - 19.051] μW. A five stage XOR based VCO design shows frequency variation [1.049 - 0.565] GHz with power consumption variation from [493.989 - 31.753] μW. Simulations have been performed by using SPICE based on TSMC 0.18μm CMOS technology. Power con-sumption and output frequency range of proposed VCOs have been compared with earlier reported circuits and proposed circuit’s shows improved performance. Keywords: CMOS, Delay Cell, Low Power, VCO, XOR and XNOR Gates 1. Introduction The Phase locked loops (PLL) are widely used circuit component in data transmission systems and have exten-sive applications in data modulation, demodulation and mobile communication.