数字电路英文版第十单元.pptx

CHAPTER 10 SHIFT REGISTERS;KEY TERMS;Load To enter data into a shift register. Ring counter A register in which a certain pattern of 1s and 0s is continuously recirculated. Stage One storage element in a register.;Shift To move binary data from state to stage within a shift register or other storage device or to move binary data into or out of the device. Universal shift register A register that has both serial and parallel input and output capability.; Shift registers consist of an arrangement of flip-flops and are important in applications involving the storage and transfer of data in a digital system.;;;;; §10.2 SERIAL IN/SERIAL OUT SHIFT REGISTERS;;;;;;;;EXAMPLE 10-1 Q4Q3Q2Q1Q0 =11010;; §10.3 SERIAL IN/PARALLEL OUT SHIFT REGISTERS;Once the data are stored, each bit appears on its respective output line, and all bits are available simultaneously, rather than on a bit-by-bit basis as with the serial output.;;EXAMPLE 10-2 The register contains 0110.; §10.4 PARALLEL IN/ SERIAL OUT SHIFT REGISTERS;;; §10.5 PARALLEL IN/PARALLEL OUT SHIFT REGISTERS;; §10.6 BIDIRECTIONAL SHIFT REGISTERS;;; §10.7 SHIFT REGISTER COUNTERS ;;;; The Ring Counter : The ring counter utilizes one flip-flop for each state in its sequence.;;;; §10.8 SHIFT REGISTER APPLICATION;EXAMPLE 10-6 Determine the amount of time delay between the serial input and each output in Figure 10-29. Show a timing diagram to illustrate.;;;;;;Digital System Design with VHDL;library ieee; use ieee.std_logic_1164.all; entity decoder is port ( a: in std_ulogic_vector(1 downto 0); z: out std_ulogic_vector(3 downto 0)); end entity decoder; ;architecture when_else of decoder is begin z = “0001” when a = “00” else “0010” when a = “01” else “0100” when a = “10” else “1000” when a = “11” else “XXXX” ; end architecture when_else;;Seven-segment display;architecture with_select of seven_seg is beg