DSP_CMD编写注意事项.docVIP

关于TMS320F28XX启动代码 使用方法 共18页 链接WARNNING选项 -w选项最好选上，有助于编译器在用户没有显式指定某一SECTION的链接方式时报warnning。 The -w option can be selected in Code Composer Studio on the Project → Build_Options menu, Linker tab, select the Advanced category, and then check the -w option box. 内存大小端模式 It is important that the large memory model be used with the C-compiler (as opposed to the small memory model). Small memory model requires certain initialized sections to be linked to non-volatile memory in the lower 64Kw of addressable space. However, no flash memory is present in this region on any current F28xx devices, and this will likely be true for future F28xx devices aswell. Therefore, large memory model should be used. In Code Composer Studio, the large memory model is on the Project → Build_Options menu. Select the Compiler tab, choose the Advanced category, and check the -ml option box. For non-DSP/BIOS projects, one should include the large memory model Ccompiler runtime support library, rts2800_ml.lib, into their code project (as opposed to rts2800.lib, which is for the small memory model). For DSP/BIOS projects, DSP/BIOS will take care of including the required library. The user should not include the rts2800_ml.lib (or rts2800.lib) library into a DSP/BIOS project. Non-DSP/BIOSProjects链接位置 图表 SEQ 图表 \* ARABIC 1 LINK DSP/BIOS Projects链接位置 图表 SEQ 图表 \* ARABIC 2 LINK Table 2 Notes: The .trcdata section must be copied by the user from its load address (specified on the Load_Address tab) to its run address (specified on the BIOS_Data tab) at runtime. See Section 4.3 for details on performing this copy. The PIEVECT RAM is a specific block of RAM associated with the Peripheral Interrupt Expansion (PIE) peripheral. On current F28xx devices, the PIE RAM is a 256x16 block starting at address 0x000D00 in data space. For other devices, confirm the address in the device datasheet. The memory section manager in the DSP/BIOS configuration tool should already have a pre-defined memory named PIEVECT. Th