基于fpga的数字密码锁(使用矩阵键盘 ).docVIP

基于FPGA 数字密码锁 板子使用的是DE2 顶层top module lock(reset,clk,row,col,mm0,mm1,mm2,mm3,led1,led2,led3,set_flog); input clk,reset; input [3:0]row; output wire [3:0] col; output wire [6:0] mm0,mm1,mm2,mm3; output reg led1, led2,led3; wire [3:0]key_value; reg [3:0] temp_key; reg [3:0] m0,m1,m2,m3; reg [3:0] m_0,m_1,m_2,m_3; reg [5:0] state; reg [2:0] wei; wire key_valid; reg [1:0]count_wrong; output reg set_flog; parameter valid =6b000000, set =6b000001, collection_mm =6b000010, cmd =6b000100, collection =6b001000, wrong =6b010000, correct =6b100000, die_lock =6b000011, lock =6b000111; always @(posedge clk or negedge reset) begin if(!reset) begin state=6b000000;wei=0; led3=0;set_flog=0;led1=0; led2=0; m0=15;m1=15;m2=15;m3=15; end else begin case(state) valid : if(key_valid) begin temp_key=key_value; state=collection; end else state=valid; collection : begin if(key_value=0key_value=9) begin if(led1(!set_flog))//开启状态 不能按数字键 state=valid; else if((!key_valid)(wei5)) begin led2=0; state=collection_mm; wei=wei+1b1; end else state=collection; end else if(!key_valid) state=cmd; end collection_mm: begin case(wei) 1:m0=temp_key; 2:m1=temp_key; 3:m2=temp_key; 4:m3=temp_key; endcase state=valid;