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- 2020-10-29 发布于浙江
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Designing SAR ADC Drive Circuitry
by Rick Downs, Applications Engineering Manager and Miro Oljaca, Systems Engineer
Data Acquisition Products, Texas Instruments, Incorporated
Part II: Input Behavior of SAR ADCs
The second of a three-part series, this TechNote examines the load that the input of a
modern successive approximation register (SAR) ADC presents to external circuitry.
Unlike what may be implied in a product data sheet, this input is a very dynamic load that
changes as the sampling and conversion process takes place. Selecting the external
charge reservoir circuitry to achieve optimal ac and dc performance, and minimize charge
injection effects, is discussed.
The equivalent input of the ADS8361 (Part I /acqt0221.pdf and
Fig. 1), which is representative of SAR-type ADCs. A review of the operation of these
parts is relevant in order to understand their performance limitations.
The analog input signal to be measured is connected differentially to the positive VIN+
and negative VIN- inputs. The sampling and conversion of the input signal was described
in detail previously.
S1 CN1 CN2
V
VIN- CNEG
Buffer Comparator
S3
Vmid - Control Data
Logic OUT
+
S4
C V
VIN+ P1 CPOS
CP2
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