CF片上C接口简介.pdfVIP

CYGNAL Application Note Pin Sharing Techniques for the C2 Interface Relevant evices This application note applies to the following devices: C8051F300, C8051F301, C8051F302, and C8051F303. Introduction About the C2 Pins C8051F30x devices include an on-chip Cygnal When C2 communication is idle, the C2 pins 2-Wire (C2) Interface for in-system program- (C2CK and C2D) function as user pins /RST ming, debugging, and boundary scan testing. and P0.7, respectively. The interface master Two signals are associated with the C2 Inter- initiates C2 communication by generating an face: C2 Clock (C2CK) and C2 Data (C2D). active-low strobe on the C2CK pin. Following To preserve package pins, the C2CK and C2D this strobe, the interface master may safely pins also function as the user pins /RST and ‘borrow’ the C2 pins without disturbing the P0.7, respectively. user functions. To enable in-system programming, debugging, C2CK (/RST and/or boundary scan functions, external resis- tors are typically used to isolate C2 tra ic The C2CK signal provides the clock for all C2 from the external system. The isolation config- communications. When C2 communication is uration depends on the user function associ- idle, the C2CK pin functions as the active-low ated with the /RST and P0.7 pins on the target reset I/O pin (/RST). device. This application note discusses C2 iso- lation configurations for each user function. I As a user input, the C2CK pin is used to gener- pins /RST and P0.7 are not occupied by user ate a device reset when held low for more than functions, no isolation circuitry is needed. 20 µs. As a user output, the