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JTOL Template Comparison Symbol Parameter Gen 1 Gen 2 Units Notes f1 Tolerance corner 4.9 7.5 MHz ? JRj Random Jitter 0.0121 0.01 UI rms 1 JRj_p-p Random Jitter peak- peak at 10-12 0.17 0.141 UI p-p 1,4 JPj_500kHz Sinusoidal Jitter 2 4.76 UI p-p 1,2,3 JPj_1Mhz Sinusoidal Jitter 1 2.03 UI p-p 1,2,3 JPj_2MHz Sinusoidal Jitter 0.5 0.87 UI p-p 1,2,3 JPj_4MHz Sinusoidal Jitter N/A 0.37 UI p-p 1,2,3 JPj_f1 Sinusoidal Jitter 0.2 0.17 UI p-p 1,2,3 JPj_50MHz Sinusoidal Jitter 0.2 0.17 UI p-p 1,2,3 JPj_100MHz Sinusoidal Jitter N/A 0.17 UI p-p 1,2,3 V_full_swing Transition bit differential voltage swing 0.75 0.8 V p-p 1 V_EQ_level Non transition bit voltage (equalization) -3 Pre=2.2 Post= -3.1 dB 1 Notes: 1. All parameters measured at TP1. The test point is shown in Figure 6-18. 2. Due to time limitations at compliance testing, only a subset of frequencies can be tested. However, the Rx is required to tolerate Pj at all frequencies between the compliance test points. 3. During the Rx tolerance test, SSC is generated by test equipment and present at all times. Each JPj source is then added and tested to the specification limit one at a time. Random jitter is also present during the Rx tolerance test, though it is not shown in Figure 6-1 The JTOL specs for Gen 2 comprehend jitter peaking with re-timers in the system and has a 25 dB/decade slope. Receiver Summary Recommended Equipment BSA125C with STR/SF, DPP125C, CR125A BSAUSB31 Automated Calibration, Loopback and JTOL software Luxshare-ICT fixtures (debug, characterization) and USB-IF fixture set (TBD) What is coming Sigtest 4.0 (new templates, enhanced DFE algorithm, etc) New Stressed Eye calibration (per CTS) Official USB 3.1 fixtures (TBD) Std/microA/B, Type-C CTS (summer) including official test channels Summary Higher performance with SuperSpeed USB 10 Gb/s and better user experience with USB Type-C connector and Power Delivery Higher performance, more complex design but feasible within current infrastructure Ext
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