QuartusII超简明教程CPLD_74HC_74HC11——仅供参考学习.docxVIP

  • 0
  • 0
  • 约6.06千字
  • 约 4页
  • 2023-08-21 发布于未知
  • 举报

QuartusII超简明教程CPLD_74HC_74HC11——仅供参考学习.docx

January 1988 MM54HC11/MM74HC11 Triple 3-Input AND Gate General Description Features These AND gates utilize advanced silicon-gate CMOS tech- nology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS inte- grated circuits. All gates have buffered outputs, providing high noise immunity and the ability to drive 10 LS-TTL loads. The 54HC/74HC logic family is functionally as well as pin- out compatible with the standard 54LS/74LS logic family. All inputs are protected from damage due to static dis- charge by internal diode clamps to VCC and ground.

文档评论(0)

1亿VIP精品文档

相关文档