QuartusII超简明教程CPLD_74HC_74HC00——仅供参考学习.docxVIP

  • 0
  • 0
  • 约6.04千字
  • 约 4页
  • 2023-08-21 发布于未知
  • 举报

QuartusII超简明教程CPLD_74HC_74HC00——仅供参考学习.docx

January 1988 MM54HC00/MM74HC00 Quad 2-Input NAND Gate General Description Features These NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered outputs. All de- vices have high noise immunity and the ability to drive 10 LS-TTL loads. The 54HC/74HC logic family is functionally as well as pin-out compatible with the standard 54LS/74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground

文档评论(0)

1亿VIP精品文档

相关文档