QuartusII超简明教程CPLD_74HC_74HC32—— 仅供学习交流.docxVIP

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QuartusII超简明教程CPLD_74HC_74HC32—— 仅供学习交流.docx

January 1988 MM54HC32/MM74HC32 Quad 2-Input OR Gate General Description Features These OR gates utilize advanced silicon-gate CMOS tech- nology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS inte- grated circuits. All gates have buffered outputs, providing high noise immunity and the ability to drive 10 LS-TTL loads. The 54HC/74HC logic family is functionally as well as pin- out compatible with the standard 54LS/74LS logic family. All inputs are protected from damage due to static dis- charge by internal diode clamps to VCC and ground. Typi

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