MEMORY存储芯片MT29F2G08ABBGAH4-IT-G中文规格书.pdfVIP

GeneralDescription

MicronNANDFlashdevicesincludeanasynchronousdatainterfaceforhigh-perform-

anceI/Ooperations.Thesedevicesuseahighlymultiplexed8-bitbus(I/Ox)totransfer

commands,address,anddata.Therearefivecontrolsignalsusedtoimplementthe

asynchronousdatainterface:CE#,CLE,ALE,WE#,andRE#.Additionalsignalscontrol

hardwarewriteprotectionandmonitordevicestatus(R/B#).

Thishardwareinterfacecreatesalowpin-countdevicewithastandardpinoutthatre-

mainsthesamefromonedensitytoanother,enablingfutureupgradestohigherdensi-

tieswithnoboardredesign.

moreNANDFlashdie.ANANDFlashdieistheminimumunitthatcanindependently

executecommandsandreportstatus.ANANDFlashdie,intheONFIspecification,is

referredtoasalogicalunit(LUN).ThereisatleastoneNANDFlashdieperchipenable

signal.Forfurtherdetails,seeDeviceandArrayOrganization.

Thisdevicehasaninternal4-bitECCthatcanbeenabledusingtheGET/SETfeatures.

SeeInternalECCandSpareAreaMappingforECCformoreinformation.

SignalDescriptions

Table1:SignalDefinitions

Signal1TypeDescription2

ALEInputAddresslatchenable:LoadsanaddressfromI/O[7:0]intotheaddressregister.

CE#InputChipenable:Enablesordisablesoneormoredie(LUNs)inatarget.

CLEInputCommandlatchenable:LoadsacommandfromI/O[7:0]intothecommandregister.

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