数字逻辑7-1.pptVIP

There are memory devices in the circuits;the output rely on both inputs and states ! Sequential logic design principles Basic memory devices Latch: the inputs be watched continuously and output may be changed at any time independent of the clock;Flip-flop:the input be sampled and output may be changed only at the times determined by the clock ! Bistable element A positive feedback circuit made by two inverters. State (Q) can be hold, but cannot be set ! S-R latch when both S and R is (00), the state hold ! When SR=(10) Set: set Q = 1When SR=(01) Reset: set Q = 0 Use NOR ga