数字逻辑8-1.pptVIP

  • 10
  • 0
  • 约 11页
  • 2017-09-29 发布于江苏
  • 举报
Counters Its state diagram contains a single cycle; Mode-m counter: with m states ; Design of Counters A Moore machine design Q: states output; RCO: last state . Design of Counters Coding state with binary code or Gray code; Choose minimal cost or minimal risk way for design; Choose the kind of flip-flop. Example: A mode-10 counter with increase ordered binary coding . N-bits Binary counters Mode counter Ripple counter Synchronous binary counters Serial enable logic parallel enable logic MSI Counters Input port CLK: active-up CLR :set 0, active-low LD: load data, active-low ENP

文档评论(0)

1亿VIP精品文档

相关文档