多级二维整数小波变换的FPGA实现研究.docVIP

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多级二维整数小波变换的FPGA实现研究.doc

更多电子资料请登录赛微电子网 多级二维整数小波变换的FPGA实现研究* 谭会生 (湖南工业大学电气与信息工程学院, 株洲 412008) 摘 要: 为了满足整数小波变换实时应用的需要, 研究了整数小波变换的FPGA实现问题。相对于DSP等传统实现方式, 用FPGA实现整数小波变换具有处理速度快, 可重新配置硬件, 易于修改移植等优点。论文首先描述了二维(5,3)整数小波变换的算法, 接着阐述了一种多级二维(5,3)整数小波变换的FPGA实现结构, 最后给出了硬件资源消耗、最大时钟频率和功能测试结果等FPGA实现结果。为了提高系统的处理速度, 降低系统的资源消耗, 本设计采用了参数可配置、共享一维小波变换单元等方法进行结构优化。实验结果证明了本设计结构的有效性, 逻辑功能的正确性, 修改移植方便, 具有良好的应用价值。 关键词: 图像无损压缩;多级整数小波变换;FPGA实现;共享硬件资源;参数可配置结构 中图分类号: TP391   文献标识码: A   国家标准学科分类代码: 510.4050 FPGA implementation of multilevel two-dimension integer wavelet transform Tan Huisheng (School of Electrical and Information Engineering, Hunan University of Technology, Zhuzhou 412008, China) Abstract: In order to meet the demand of real-time applications of integer wavelet transform (IWT), a FPGA implementation of IWT is researched. Comparing with classical implementation such as DSP etc, the FPGA implementation of IWT has the advantages such as higher processing speed, reconfigurable hardware, more easy to modify and transplant. First of all, this paper describes a two-dimensional (5,3) IWT algorithm, then proposes a FPGA implementation structure of a multilevel two-dimensional (5,3) IWT, and finally presents its experimental results such as hardware resource consumption, maximum clock frequency and function testing results. In order to improve the processing speed, and reduce the resource consumption, the proposed structure is optimized by using configurable parameter, sharing one-dimensional wavelet transform unit etc. The experimental results show that the structure of this design is available, the logic function is correct, the modification and transplant is more easy, and it is of great value in application. Keywords: image lossless compression; multilevel integer wavelet transform; FPGA implementation; sharing hardware resources; configurable parameter structure 1 引 言 随着社会的不断发展和进步, 出于资源共享和远程测控的需要, 出现了基于互联网Internet的远程测控系统[1-2]。而远程测控系统一般包括共享设备端、服务器和用户端3个组成部分, 用户端主要是执行现场信息的采集、反馈信息的接受及有关信息的处理等任务, 其测控信息大多是视频信息

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