毕业论文：基于CPLD的数字存储示波器设计.docVIP

PAGE  PAGE 33 摘要 该数字存储示波器采用静态存储采样量化后的波形数据，CPLD控制RAM的地址线,单片机的P1口协同控制高位地址的方式控制采样、存储和双踪显示数据。 采用高速模数转换器TLC5510芯片，直接用CPLD准确定时ADC的采样速率。用两片模数转换器、两片存储器和两片数模转换器，分别对两路信号进行采样量化和存储。采用双口RAM(IDT7132)存储采样量化后的波形数据，同样用CPLD控制RAM的地址线。IDT7132有两组相互隔离的数据线、地址线、片选线和读写控制线，它们可对RAM内部的存储单元同时进行读写操作，并且互不影响，这样就解决了高速存储和读取的问题。DAC0832实现程控电压衰减。信号由DAC0832的参考电压端输入，单片机通过改变送入DAC0832的数据值控制输出信号的幅度。 关键词: 数字存储示波器,采集,高速模数转换器,随机存取存储器 Abstract This Digital Storage Oscilloscopes adopt the wave data that is sampled and quantizated to static store, CPLD controls the address line of RAM, P1 mouth of Microsoft Control Unit controls the high-order way of address, stores with one pair of tracks showing data in coordination. This Digital Storage Oscilloscopes adopts the high-speed analog-to-digital conversion TLC5510, uses the sample speed of accurate timing ADC of CPLD directly, using ADC with two modulus converter, two memory and DAC with two modulus converter to sample and store two distance signal separately. It adopts dual port RAM (IDT7132) to sample and store the quantizated wave-data, to control address line of RAM with CPLD too. IDT7132 has two data lines, address lines, chip selection lines, they read and write and control each group line absolutely. They write and read the storage unit in RAM at the same time, without influence to each other. Therefore, they solve the problems in storing and reading at a high speed like this. DAC0832 realizes the programmer-controlled voltage decays. The signal is inputted by the reference voltage end of DAC0832, the Micro Control Unit controls the range that outputs the signal through changing the data value, sent into DAC0832. Keyword: Digital Storage Oscilloscopes, gathers, the high-speed analog-to-digital conversion, arbitrary access memory 目录  TOC \o 1-3 \h \z  HYPERLINK \l _Toc106116840 摘要  PAGEREF _Toc106116840 \h I  HYPERLINK \l _Toc106116841 Abstract  PAGEREF _Toc106116841 \h II  HYPERLINK \l _Toc106116842 1 绪言  PAGEREF _Toc106116842 \h