数字设计基础 双语教学版 教学课件 作者 英Barry Wilknson 双语课件（第7章）.pptVIP

7.4 Testing sequential circuits The boundary scan output of one chip connects to the boundary scan input of the next chip to form a long shift register. Chips can be individually disabled from the test by having a selectable path. * 7. Testing logic circuits 7.1 The need for testing 7.2 Faults and fault models 7.3 Generating test vectors 7.4 Testing sequential circuits 7.1 The need for testing ? How to know a fault exists? By applying test signals to the primary inputs and observe the primary outputs. If the outputs are different from what is expected, we know a fault exists. ?