毕业设计（论文）-基于FPGA数字滤波器的设计.doc

摘要 伴随技术的快速进步，电子领域的变化也是日新月异，而数字滤波器因为其优良性能而应用广泛，数字滤波器是数字信号处理的一个分支。在现实应用中,灵活与实时这两个特性是信号处理的基本要求，但是目前来说一般很难满足这两个指标。当FPGA和电子设计自动化技术进步越来越快，很多电子设计师开始选择用FPGA来完成数字滤波器的设计,因为FPGA不仅可以兼顾系统的灵活性而且实时性也可以保障。但是要改变滤波器的类型即修改其参数时，需要设计者通过再次变成来进行改变,这样一来设计资源产生极大浪费。 面对这种现象，采用以多种算法为基础，在FPGA下进行操作，并且得到程序代码，在此基础上需要开发出相应的软件系统,这样系统资源浪费现象可以受到抑制，从而使设计的周期极大的缩短。数字滤波器的方法是滤波器设计的关键。由于有限滤波器的线性相位性和时延的不变性，所以数字滤波器在实际应用的地位很重要。 关键词：FIR数字滤波器；FPGA；EDA技术 Abstract With the development of electronic technology, digital filters with its good characteristics is widely used in various fields. It belongs to the digital signal processing is one of the basic modules. In engineering practice, signal processing of flexibility and real time requirement high, and some existing software and hardware design way is difficult to achieve at the same time the two requirements. With programmable logic devices and EDA technology development, the use of FPGA to realize digital filters, can also give consideration to the real time and the flexibility of the system, more and more of the electronic engineer the FPGA device to realize the filter. However, when the filter filter parameters change, or need hardware engineer to write the code, which caused a lot of design waste of resources. According to this problem, this paper studies the FPGA platform based on all kinds of the design of the digital filter algorithm, based on the algorithm of research that a with all sorts of algorithm to realize the filter code library, and based on this code library development that can automatically generate hardware of software code filter system, thus eliminating the design parameters for the design of change and lead to waste, greatly reducing the filter design cycle. Digital signal processing of the discipline of a great progress on digital filter is the study of the method of design. And FIR digital filters can be realized linear phase, the group delay not on frequency change, so in digital signal processing occupied a very important positio