46NUETRALPOINTCLAMPED(NPC)INVERTERS：46中性点钳位（NPC）逆变器.pptVIP

NAA-2002 4.6 NUETRAL POINT CLAMPED (NPC) INVERTERS Known as three-level inverters Problem of 2-level inverter in high-power applications High DC link voltage requires series connection of devices ? difficulty in dynamic voltage sharing during switching Solved using NPC inverter or multilevel inverter NPC inverter circuit NPC (2) NPC (3) DC link capacitor split to create neutral point 0 Q11, Q14 : main devices (2-level inverter) Q12, Q13 : auxiliary devices – clamp output potential to neutral point with help of clamping diodes D10 D10’ All PWM techniques apply NPC inverter operation Consider HEPWM technique to eliminate 2 lowest significant harmonics (5th and 7th) and control fundamental voltage NPC (4) Phase voltage waveform (va0) and corresponding gate signals NPC (5) Each output potential clamped to neutral potential in off periods of PWM control For positive phase current +ia, Q11, Q12 : when va0 positive D13, D14 : when va0 negative D10, Q12 : at neutral clamping condition For negative phase current -ia, D11, D12 : when va0 positive Q13, Q14 : when va0 negative O13, D10’ : at neutral clamping condition Operation mode gives : 3 levels waveform for phase voltage (va0 ) ? +0.5 Vd, 0 , -0.5 Vd Levels of line voltage (vab) waveform of ? +Vd, -Vd, +0.5 Vd, -0.5 Vd and 0 NPC (6) Prove that each device has to withstand 0.5 Vd voltage D10, D10’ conducting : voltage across main device clamped to +0.5 Vd When lower devices conducting : Vd appears across the upper devices in series (devices share 0.5 Vd statically) At any switching, voltage step size across the series string = 0.5 Vd ? permits series connection of devices without exceeding 0.5 Vd rating Each leg has 3 switching states State A : Upper switches ON State B : Lower switches ON State C : Auxiliary switches ON Available switching states = 33 = 27 ( 8 for two-level inverters) Advantages Allows voltage clamping NPC (7)