一种高精度CMOS带隙基准电路的设计.pdfVIP

Micr electr nic Device Techn l gy 一种高精度CMOS带隙基准电路的设计 , , , ( , 300071) : A SMC 0. 35 Lm CMOS 、 (PSRR) 、、 1V 。, , , (PTAT) 。 , - 40~ 12 5 e 1. 6~ 5 V , 3 . 68 @10- 6 / e , Vr ef 0. 094 mV; - 114. 6 dB PSRR, 1 kH z- 109 . 3 dB, 10 kHz - 90 . 72 dB。 : (CMOS) ; ; ; ; : TN402; TN432 : A : 167 1- 4776 (2009) 02- 012 3- 04 Design of a High Precision CMOSBandgap Reference Circuit Zhang H ngli, Zhang Xia xing, Dai Yujie, L™Yingjie ( Institute of I nf ormation Science Technology , Nankai University, T ianj in 300071, China) Abstract: By using ASMC 0. 35 Lm c mplementary metal2 xide semic ndut r ( CMOS) m del, a high perf rmance bandgap reference circuit was designed, which is with 1 V utput v ltage, l w p wer c nsumpti n, high p wer supply rejecti n rati (PSRR) and l w temperature c efficient. The casc de self2biased v ltage structure f r amplifier was applied, and the utput f the pera2 ti nal amplifier ( OPAMP) was used as the bias f itself and the next stage. A pr perti nal t abs lute temperatur e ( PTAT ) temperatur e c mpensati n was realized. The Cadence Spectre was used f r the simulati n. The results sh w that the utput v ltage temperature c efficient is - 6 3. 68 @10 / e and the v ltage swing is less than 0. 094 mV at 1. 6- 5 V p wer supply v ltage fr m - 40 e t 12 5 e , and the PSRR is - 114. 6 dB at l w frequencies, where - 109. 3 dB at 1 kHz and - 90. 72 dB at 10 kHz. Key words: c mplementary metal2 xide semic nduct r ( CMOS) ; casc de self2bias structure; bandgap refer ence; temper