Memory-Hierarchy-Design---Part-5--Crosscutting-issues-and-the-memory-design-of-the-ARM-Cortex-A8-教程.pdfVIP

Memory Hierarchy Design - Part 5. Crosscutting issues and the memory design of the ARM Cortex-A8 John L. Hennessy, Stanford University, and David A. Patterson, University of California, Berkeley - October 23, 2012 Editors Note: Demand for increasing functionality and performance in systems designs continues to drive the need for more memory even as hardware engineers balance the dynamics of system capability, power, and cost against the growing performance gap between processor and memory. Architectures based on memory hierarchy address these issues, and what better source for the details of this approach than an excerpt on the subject from the seminal book on Computer Architecture by John Hennessy and David Patterson. This excerpt comprises: Part 1, Basics of Memory Hierarchies, which looked at the key issues surrounding memory hierarchies and set the stage for subsequent installments addressing cache design, memory optimization, and design approaches. Memory Hierarchy Design - Part 2. Ten advanced optimizations of cache performance, which reviewed ten advanced optimizations of cache performance Memory Hierarchy Design - Part 3. Memory technology and optimizations, which examined innovations in main memory that offer improved system performance Memory Hierarchy Design - Part 4. Virtual memory and virtual machines, which examined architecture support for protecting processes from each other via virtual memory and the role of virtual machines This installment, which puts it all together with a look at crosscutting issues for memory hierarchy design and reviews the memory design of the ARM Cortex-A8. Adapted from Computer Architecture, Fifth Edition: A Quantitative Approach by John Hennessy and David Patterson (Mo