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for the assignment problem. In XIII Brazilian Operations Research Symposium,
Bibliography of
Mauricio G.C. Resende
(Updated: May 14, 2007)
References
[1] M.G.C. Resende. Implementation and testing of a primal-dual algorithm
for the assignment problem. In XIII Brazilian Operations Research Sym-
posium, pages 284–299, October 1980. In Portuguese.
[2] R.E. Campello, L.H. Coutinho, and M.G.C. Resende. A generation dis-
patching system for the analysis of transmission and energy interchange
in Brazil. Chilean J. of Systems Engineering, 4:45–68, 1984. In Spanish.
[3] M.G.C. Resende. Computer simulation of semiconductor wafer fabrica-
tion. Technical Report ORC 86-14, Operations Research Center, Univer-
sity of California, Berkeley, CA, December 1985.
[4] M.G.C. Resende. A computer program for reliability evaluation of large-
scale networks via polygon-to-chain reductions. IEEE Transactions on
Reliability, R-35:24–29, 1986.
[5] C.R. Glassey and M.G.C. Resende. Seeking an optimally balanced dis-
patching rule for semiconductor wafer fabrication. J. Electrochemical So-
ciety, 133:C327–C327, 1986.
[6] M.G.C. Resende. Shop floor scheduling of semiconductor wafer manufac-
turing. PhD thesis, University of California, Berkeley, CA, August 1987.
[7] C.R. Glassey and M.G.C. Resende. Closed-loop job release control for
VLSI circuit manufacturing. IEEE Transactions on Semiconductor Man-
ufacturing, 1:36–46, 1988.
[8] C.R. Glassey and M.G.C. Resende. A scheduling rule for job release in
semiconductor fabrication. Operations Research Letters, 7:213–217, 1988.
1
[9] R.A. Zuanich, D.F. Ruffcorn, and M.G.C. Resende. Beyond the
spreadsheet– Wafer production planning with start demand ra
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