超低功耗流水线式ADC的研究和设计.pdf

ABSTRACT ABSTRAC’I’： Withthe of information digital processing development to been usedinthefieldsofwireless DigitalConvener)haswidely the of devicesinrecent collection，etc．Additionally,withpopularityportable years，and consideration andenvironmental ultra—low for-thecost，market power protection，ADC’S at hasbecomeahotissue design present． Toachieveultra-low 8bit ADCwith 1 powerconsumption，anpipeline only609W is inthis ADCwhich dynamic consumptiondesigned paper．The average power withSMIC0．1 1P6MCMOS worksunder1．2V and supply designed 81am process power is500KSPS．Inordertoachievetheultralow its rate powerdesign typicalsampling of twomethods．Theoneis theMOSFETs goals，thispapermainlyadopts setting thecircuitbranch toworkundersubthresholdtoreduce operationalamplifiers region currentandthe otheroneis and the requiredsupplyvoltage．The improvingoptimizing circuits’structures．Basedonthe design andrulesofconsiderationof layout principle mix fullcustomof8bit ADCis IC，the designed． signal