Dynamic Management Technique to Mitigate Performance.pptVIP

2007/04/19 Cool Chips X Dynamic Management Technique to Mitigate Performance Degradationfor Low-Leakage Caches Reiko Komiya, Koji Inoue, Kazuaki Murakami Kyushu University Outline Introduction Leakage energy of cache memory Conventional low leakage cache : Cache decay Problem of cache decay approach Solution: “Always-Active scheme” Results Conclusions Introduction Normal cache Conventional low-leakage cache Mode transition algorithmfor cache decay Performance impact of extra-misses Our Goal Problem of conventional low-leakage caches Degrades the performance due to extra-misses Our approach Reduces extra-misses and improve performance Prohibits some cache lines from going to sleep mode Analysis of extra-misses Extra-Miss Density (EMD): Characteristics of extra-misses Always-Active scheme Introduces “Always-Active mode (AA mode)” Identifies cache lines which would cause frequently extra-misses, and marks the line AA mode line Prohibits AA mode line from going to sleep mode Reduces extra-misses in AA mode line How to identify AA mode lines (a) Decay interval has passed since the last access (b) Tag hits In the case of normal cache, this access would be hit In the case of cache decay, this access would be extra-miss Mode transition algorithmfor AA scheme How to measure EMCDi dynamically Hardware implementationfor AA scheme Experimental setup Evaluation models Base: normal cache Decay: conventional low-leakage cache AA2: cache decay with AA Scheme (threshold value=2) Cache configuration L1 data cache Cache size: 32KB Associativity: 32way Hit latency: 1 clock cycle Miss penalty: 64 clock cycles Evaluation items Normalized execution time (against Base model) Normalized energy consumption (against Base model) Etotal = LEL1+DEL1+DEmemory Performance Energy consumption Conclusions We have proposed a high-performance, low-leakage cache: AA Scheme Detects lines which cause EMC frequently at run time Improves the performance by means of making the lines AA mode an