数字图像处理系统DM642介绍分析报告.pptVIP

* * High-Performance Digital Media Processor (TMS320DM642) – 500-, 600-MHz Clock Rate – Eight 32-Bit Instructions/Cycle – 4000, 4800 MIPS – Fully Software-Compatible With C64x. TMS320DM642 VelociTI.2. Extensions to VelociTI. Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x. DSP Core – Eight Highly Independent Functional Units With VelociTI.2. Extensions: – Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle – Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle – Load-Store Architecture WithNon-Aligned Support – 64 32-Bit General-Purpose Registers – Instruction Packing Reduces Code Size – All Instructions Conditional Instruction Set Features – Byte-Addressable (8-/16-/32-/64-Bit Data) – 8-Bit Overflow Protection – Bit-Field Extract, Set, Clear – Normalization, Saturation, Bit-Counting – VelociTI.2. Increased Orthogonality 2级CACHE数量不同与 TMS320C6416 L1/L2 Memory Architecture – 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped) – 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative) – 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation) C64X DSP 核心 64-Bit External Memory Interface (EMIF) – Glueless Interface to Asynchronous Memories (SRAM and EPROM) and Synchronous Memories (SDRAM, SBSRAM, ZBT SRAM, and FIFO) – 1024M-Byte Total Addressable External Memory Space 外挂存储器 极限空间比DAM6416小 10/100 Mb/s Ethernet MAC (EMAC) – IEEE 802.3 Compliant – Media Independent Interface (MII) – 8 Independent Transmit (TX) and 8 Independent Receive (RX) Channels 直接以太网集成 Three Configurable Video Ports – Providing a Glueless I/F to Common Video Decoder and Encoder Devices – Supports Multiple Resolutions and Standards – Supports RAW Video I/O – Transport Stream Interface Mode 直接图象接口不同与TMS320C6416 VCXO Interpolated Control Port (VIC) – Supports Audio/Video Synchronization Host-Port Interface (HPI) [32-/16-Bit] 32