ANOREmulationStrategyoverNANDFlashMemory.pptVIP

Copyright ? All Rights Reserved by Jian-Hong Lin Copyright ? All Rights Reserved by Jian-Hong Lin A NOR Emulation Strategy over NAND Flash Memory Jian-Hong Lin, Yuan-Hao Chang, Jen-Wei Hsieh, and Tei-Wei Kuo Embedded Systems and Wireless Networking Laboratory Dept. of Computer Science and Information Engineering National Taiwan University Taipei, Taiwan * * * Copyright ? All Rights Reserved by Jian-Hong Lin Agenda Research Motivation An Efficient Prediction Mechanism Performance Evaluation Conclusion * * * Copyright ? All Rights Reserved by Jian-Hong Lin Comparison between NAND and NOR NOR SLC NAND (large-block, 2KB) Access Method Random Sequential Access Speed Read: 23.84 MB/sec Write: 0.07 MB/sec Erase: 0.22 MB/sec Read: 15.33 MB/sec Write: 4.57 MB/sec Erase: 6.25 MB/sec Density Low High Price High (34.55 $/GB) Low (6.79 $/GB) Application Code storage low-end mobile handsets PC BIOS chips Data storage MP3 player (music storage) Digital Cameras (image storage) * * * Copyright ? All Rights Reserved by Jian-Hong Lin Motivation Replace NOR with NAND for code storage Challenge: How to fill up the performance gap between NAND and NOR? Use SRAM for data caching Prediction scheme Implementation design * * * Copyright ? All Rights Reserved by Jian-Hong Lin A Prediction-based Prefetching Strategy An Example Scenario Offline: Traces analysis 1. Online: Prefetch the data based on the prediction information 2. * * * Copyright ? All Rights Reserved by Jian-Hong Lin The System Architecture Cache for data access Communication with the host system For code and data storage Address translation from byte addressing to LBA addressing Prefetch data from NAND to SRAM based on prediction info. * * * Copyright ? All Rights Reserved by Jian-Hong Lin A Prediction Graph A prediction graph An Illustration of the access patterns(a sequence of LBA’s) One node for each LBA in the graph seq i … 1000, 1001, 1002, 1003, 740, … seq j … 1000, 1001, 345, 346, 347, … 1000 1001 1002 1003