Trace32多核系统调试.ppt

AMP系统同步机制(硬件) Target System ARM DSP Cross Trigger 1. 2. 3. 4. AMP系统同步机制(硬件) Target System ARM DSP Cross Trigger 2. 1. BKPT AMP系统同步机制(硬件) Synchronous start by CTI is supported by: Cortex-R4 Cortex-A5/8/9 Cortex-M3 (revision 2 or later) Synchronous stop is supported, if the CTI implementaton follows the ARM recommendations. Debugger requires additional setup to use CTI: SYStem.CONFIG CTICONFIG ARMV1 ; without supporting restart SYStem.CONFIG CTICONFIG CortexV1 ; with supporting restart Some chips require a custom setup, e.g.: SYStem.CONFIG CTICONFIG OMAP3 AMP系统示例演示 OMPA5912 (ARM926EJ + TMS320C55X) 电源 USB/ETH Multi-Core Debugging AMP和SMP概念 AMP 系统调试和同步机制 SMP 系统调试 SMP实例(1) SMP实例(2) SMP系统配置(ARM11MPCore) ARM11 TDI TDO Instruction Register Data Register 5 1 ETB TDI TDO Instruction Register Data Register 4 1 ARM11 TDI TDO Instruction Register Data Register 5 1 ETB TDI TDO Instruction Register Data Register 4 1 TDI TDO 13. 3. 0. 0. 9. 2. 5. 1. 13. 3. 0. 0. 9. 2. 5. 1. 4. 1. 9. 2. 0. 0. 13. 3. SYStem.CONFIG CoreNumber 2. Core 0 1: SYStem.CPU ARM11MPCore SYStem.CONFIG IRPRE SYStem.CONFIG DRPRE SYStem.CONFIG IRPOST SYStem.CONFIG DRPOST SYStem.CONFIG ETBIRPRE SYStem.CONFIG ETBDRPRE SYStem.CONFIG ETBIRPOST SYStem.CONFIG ETBDRPOST SYStem.Up SMP系统配置(Cortex-A MPCore) TDI TDO Core 0 DAP TAP APB-AP ETM 0 CTI 0 ETB TPIU Funnel Core 1 ETM 1 CTI 1 SYStem.CPU CortexA9MPCore SYStem.CONFIG COREBASE SYStem.CONFIG CTIBASE SYStem.CONFIG ETMBASE SYStem.CONFIG ETMFUNNELPORT SYStem.CONFIG FUNNELBASE SYStem.CONFIG TPIUBASE SYStem.CONFIG ETBBASE SYStem.Up SMP: 00000x8011C000 0x8011D000 0. 1. 000 SYStem.CONFIG CoreNumber 2. Shared components SMP系统调试 SMP系统调试 Single ASM Step: One core only Single HLL Step: All cores Go: All cores Break: All cores SMP系统调试 Register.view /CORE core_number Register.Set /CORE core_number Data.List /CORE core