MemoryAddressing课程.pptVIP

Memory Addressing 1. Memory Addresses Intel address terminology: Logical – segment + offset Linear (virtual) – 0 .. 4GB Physical - 0 .. 4 GB (64GB with PAE) Logical - Linear (paging) - Physical Paging can be disabled Segmentation required Though you can just have one big segment 2. Segmentation in IA32 2.1. Segment Selectors and Segmentation Registers real mode and protected mode A logical address consists of two parts: a segment identifier and an offset registers to hold Segment Selectors: cs, ss, ds, es, fs, and gs. 2.2. Segment Descriptors Each segment is represented by an 8-byte Segment Descriptor. Segment Descriptors are stored either in the GDT or in LDT. Only one GDT is defined, while each process is permitted to have its own LDT several types of Segment Descriptors: Code Segment Descriptor Data Segment Descriptor Task State Segment Descriptor (TSSD) Local Descriptor Table Descriptor (LDTD) G: Granularity flag, in bytes or 4kb. Type: segment type 2.3. Segmentation Unit segmentation unit : translate logical address into a corresponding linear address. 3. Segmentation in Linux Linux 2.6 uses segmentation a very limited way only when required by IA32. All processes use the same four segments. The Linux GDT uniprocessor systems : only one GDT multiprocessor systems : one GDT for every CPU 18 segment descriptors included in GDT Four user and kernel code and data segments A Task State Segment (TSS) A segment including the default LDT, shared by all processes Three Thread-Local Storage (TLS) segments Three segments related to Advanced Power Management (APM ) Five segments related to Plug and Play (PnP ) BIOS services A special TSS segment used by the kernel to handle Double fault exceptions The Linux LDTs Most applications do not make use of LDT, most processes share a default LDT. 4. Paging in IA32 The paging unit translates linear addresses into physical ones. Terms Page page frame page table cache TLB The aim of this tw