CPSC614GraduateComputerArchitectureCacheDesign.pptVIP

CPSC 614:Graduate Computer ArchitectureCache Design Based on lectures by Prof. David Culler Prof. David Patterson UC Berkeley Who Cares About the Memory Hierarchy? CPU-DRAM Gap 1980: no cache in μproc; 1995 2-level cache on chip(1989 first Intel μproc with a cache on chip) Generations of Microprocessors Time of a full cache miss in instructions executed: 1st Alpha: 340 ns/5.0 ns = ?68 clks x 2 or 136 2nd Alpha: 266 ns/3.3 ns = ?80 clks x 4 or 320 3rd Alpha: 180 ns/1.7 ns =108 clks x 6 or 648 1/2X latency x 3X clock rate x 3X Instr/clock ? -5X Processor-Memory Performanc