数字逻辑单元特性分析-实验指导书.docVIP

实验：数字逻辑单元特性分析 实验目的： 1．数字逻辑单元特性 2．掌握数字逻辑单元特性 实验原理：Spice是Simulation Program with Integrated Circuit Emphasis的缩写，是一种功能强大的通用模拟电路仿真器SPICE可对电路进行非线性直流分析、非线性瞬态分析和线性交流分析。被分析的电路中的元件可包括电阻、电容、电感、互感、独立电压源、独立电流源、各种线性受控源、传输线以及有源半导体器件。SPICE内建半导体器件模型，用户只需选定模型级别并给出合适的参数。Spice程序结构如下： 标题 *Title Statement - Ignored during simulation 控制语句 .option nomod nopage .tran 1 10 .print v(5) i(r1) .plot v(3) v(in) * voltage sources 源 v3 3 0 dc 0 ac 0 0 pulse 0 1 0 0.1 0.1 4 8 vin in 0 sin(0 2 10k 0.5 0) * Components 元件描述 c2 2 0 2pf r1 1 0 1k m1 1 2 3 4 mod L=10u W=30u x3 2 3 INV *Model Subcircuit 模型及子电路 .model... or .LIB or .Subckt 文件结束 . .end .measure语句可以用来测量，.measure语句具有几种不同的格式，可以进行直流，交流和瞬态分析。 （1）Rise, Fall, Delay 语法：.MEASURE DC | AC | TRAN result TRIG ... TARG ... TRIG (trigger) 语法： TRIG trig_var VAL=trig_val TD=time delay CROSS=c RISE=rFALL=f 或 TRIG AT=val TARG ( target) 语法： TARG targ_var VAL=targ_val TD=time delay CROSS = c | LAST RISE = r | LAST FALL=f | LAST 其中： TRIG and TARG specifies the beginning of the trigger and of the target signal specs. trig_var is the name of the output variable which determines the beginning of the measurement trig_val is the value of the trig_var at which the counter for crossing, rises or falls is incremented by one targ_var is the name of the output variable whose propagation delay is determined with respect to trig_var targ_val specifies the value of the targ_var at which the counter for crossing, rise or falls is incremented by one time_delay amount of delay before the measurement should start cross=c, rise=r, fall=f indicates which occurences of CROSS,FALL or RISE event causes a measurement to be performed last indicates that the measurement is performed when the last CROSS, FALL or RISE event occurs at=val is a case where val indicates the time for TRAN, frequency for AC and parameter for DC, when measurement should start. 例如： .MEASURE TRAN tdlay TRIG V(1) VAL=2.5 TD = 10n RISE=2 TARG V(2) VAL=2.5 FALL=2 其他测量模式还包括： （2）Average, RMS, min, m