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New Speed Records for Montgomery Modular Multiplication on 8-bit AVR MicrocontrollersZheLiuandJohannGro?sch¨adlUniversity of Luxembourg,Laboratory of Algorithmics, Cryptology and Security (LACS), 6, rue Richard Coudenhove-Kalergi, L–1359 Luxembourg{zhe.liu,johann.groszschaedl}@uni.luAbstract. Modular multiplication of large integers is a performance- critical arithmetic operation of many public-key cryptosystems such as RSA, DSA, Diffie-Hellman (DH) and their elliptic curve-based variants ECDSA and ECDH. The computational cost of modular multiplication and related operations (e.g. exponentiation) poses a practical challenge to the widespread deployment of public-key cryptography, especially on embedded devices equipped with 8-bit processors (smart cards, wireless sensor nodes, etc.). In this paper, we describe basic software techniques to improve the performance of Montgomery modular multiplication on 8-bit AVR-based microcontrollers. First, we present a new variant of the widely-used hybrid method for multiple-precision multiplication that is 10.6% faster than the original hybrid technique of Gura et al. Then, we discuss different hybrid Montgomery multiplication algorithms, includ- ing Hybrid Finely Integrated Product Scanning (HFIPS), and introduce a novel approach for Montgomery multiplication, which we call Hybrid Separated Product Scanning (HSPS). Finally, we show how to perform the modular subtraction of Montgomery reduction in a regular fashion without execution of conditional statements so as to counteract Simple Power Analysis (SPA) attacks. Our AVR implementation of the HFIPS and HSPS method outperforms the Montgomery multiplication of the MIRACL Crypto SDK by up to 21.58% and 14.24%, respectively, and is twice as fast as the modular multiplication of the TinyECC library.Keywords:AVRarchitecture,multi-precisionarithmetic,hybridmulti- plication, modular reduction, SPA countermeasure.IntroductionLong integer modular arithmetic, in particular modular mult