C2000教学光盘(茨维考应用科技大学)Part1详解.ppt

1 - * Digital Signal Controller TMS320F2812 Texas Instruments Incorporated European Customer Training Center University of Applied Sciences Zwickau (FH) Module 1 : Architecture C281x Block Diagram 32x32 bit Multiplier Sectored Flash A(18-0) D(15-0) Program Bus Data Bus RAM Boot ROM 22 32-bit Auxiliary Registers 3 32 bit Timers Realtime JTAG CPU Register Bus R-M-W Atomic ALU PIE Interrupt Manager 32 32 32 Event Manager A Event Manager B 12-bit ADC Watchdog McBSP CAN2.0B SCI-A SCI-B SPI GPIO C28x CPU 32-bit fixed-point DSP 32 x 32 bit fixed-point MAC Dual 16 x 16 single-cycle fixed-point MAC (DMAC) 32-/64-bit saturation 64/32 and 32/32 modulus division Fast interrupt service time Single cycle read-modify-write instructions Unique real-time debugging capabilities Upward code compatibility Data Bus 32-bit Auxiliary Registers 3 32 bit Timers Realtime JTAG CPU Register Bus R-M-W Atomic ALU Program Bus MCU/DSP balancing code density execution time. Supports 32-bit instructions for improved execution time; Supports 16-bit instructions for improved code efficiency PIE Interrupt Manager 32x32 bit Multiplier XT (32) or T/TL MULTIPLIER 32 x 32 or Dual 16 x 16 P (32) or PH/PL AH (16) C28x Multiplier and ALU / Shifters Data Bus Data Bus Program Bus ALU (32) 32 32 32 32 32 AL (16) 32 32 ? 16/32 8/16 Shift R/L (0-16) ACC (32) AH.MSB AH.LSB AL.MSB AL.LSB 32 Shift R/L (0-16) 32 Shift R/L (0-16) 32 16 8/16/32 C28x Pointer, DP and Memory XAR0 XAR1 XAR2 XAR3 XAR4 XAR5 XAR6 XAR7 ARAU MUX Data Memory MUX DP (16) Data Bus Program Bus 6 LSB from IR XARn ? 32-bits ARn ? 16-bits 22 32 C28x Internal Bus Structure Data-write Address Bus (32) Program Address Bus (22) Execution R-M-W Atomic ALU Real-Time Emulation Test Engine Program-read Data Bus (32) JTAG Program Decoder PC XAR0 to XAR7 SP DP @X ARAU MPY32x32 XT P ACC ALU Registers Debug Register Bus / Result Bus Data/Program-write Data Bus (32) Data-read Address Bus (32) Data-read Data Bus (32) Memory Data (4G *