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VCS常用令说明
VCS常用命令说明
1、VCS仿真环境:
2、VCS常用编译命令:
vcs source_files [source_or_object_files] options
eg: vcs top.v toil.v -RI +v2k
source_files
The Verilog, OpenVera assertions, or OpenVera testbench source files for your design separated by spaces.
source_or_object_files
Optional C files (.c), object files (.o), or archived libraries (.a). These are DirectC or PLI applications that you want VCS to link into the binary executable file along with the object files from your Verilog source files.
Options
Compile-time options that control how VCS compiles your Verilog source files.
Details of Options:
+incdir+d
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