Altera可编程逻辑器件结构讲解.ppt

Altera可编程逻辑器件结构 Altera主流PLD器件 高端高密度FPGA Stratix、StratixII、StratixIII Stratix GX、StratixII GX 低成本FPGA Cyclone、Cyclone II CPLD MAX3000A、MAX II 高端高密度FPGA ：Stratix系列 器件概述 平面布局 逻辑阵列块（LAB）、互连线（Interconnect）资源、逻辑单元（LE） 内嵌RAM块 时钟网络和锁相环 DSP块 I/O 器件概述 The Stratix family of FPGAs is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities of up to 114,140 logic elements (LEs) and up to 10 Mbits of RAM. Stratix devices offer up to 28 digital signal processing (DSP) blocks with up to 224 (9-bit × 9-bit) embedded multipliers, optimized for DSP applications that enable efficient implementa