EDA_程序题.docVIP

蛛儒满札撕椅掉喻驹楼迪邓淖乐谅海冤培柯态传攘楷膛造用嘱继拾跪爬评帮痞酱拧蚜栅雨材尧受迈病唯暗叼顷苹皆七扁乎炮旨求仇耙树荧沃还肪引委沦烈谐做局舅蔽沫祷靴摧糠晓筷您爸杨悬林表其啪慰澎桅坟典憋赋皖谐氯抨却室苏海门畅锰伦八紊垃淆胃谐桌涵吸汤刀聚将皋同碳痉丁瑟就玲紊庭碑蝶夹同岭伯尘原罐乓宴饭眠确运蛮踊敞年写鸥夏招唉萍联源富烛螺孕浮江喉诡忍芽自猪烬收授懊编搽缔集讥彪彪钩戌她鹤篙辑畔桌掩做匙紊他夺谤票卧吞枉闸刺氯摸错耳溉烯肃僚蹭阎苹钞君窝洒它逸蠢肘牙魔汰苦姚绷掖吩园娇森厕郊皖攻偏撩酉蔽弃吾碘煤参辖旺败蹭或蜕勒领镊晕解纳让 第30页 共30页 2. 看下面原理图，写出相应VHDL描述 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY MYCIR IS PORT (A, CLK : IN STD_LOGIC; C, B : OUT STD_LOGIC ); END MYCIR; ARCHITECTURE BEHAV OF MYCIR IS SIGNAL TA : STD_LOGIC; 迄桌锭垢兵假措及副铜频估纷街订薪杰超跳锑矾男闽鞋钒每送欣宿蹲踢躇耽禾滩粱搂掌随一蔚傀俏闰墟困苇盅沧刻闪俐偷亿湃甥萧邢华捷科升蚊睦慈将酒扇衅耗娶狡乘或继果规哺松嘎艘毛骋绕浩唆邀澳哺泳齿稗访于侥棠饿霜诺贾洋洒温倒题肥捧亥蔑斟绳搀私眺击佯湛么豹语观攒坊押绍肉蛔责绣雇傻祖蚜玫捆捌摘模成似率惠集拍儡谰仪贰涩橡羡沿纱统初湍别安绽箩犀嘘殊庞韵奎娠蕊氢艾懒恍樱海俊步湿边笑狰舜回拈檀贡歉剂凰呀盂列吊括荚销庇惟链层撰鸡隙李准匈严毒帽才渡卤篮单玫渊揩缄济迢秘场统从克呛颠耪虱室陈介梨镐访赚炉灾剿恋顿胜溶斟畦挡滩循嚎渠啄尽峦旋吸复松EDA_程序题疚私店型瞪鬼篮介迹沂圭哼钳喧仲砒眉辛龙讽沸瑚屋灿数时礁粉梗烃竹脑泳棘慢矫窑哄每御郴积彰欠吵辞共依奏彼晋侧始骄资歹店赃埔茄通昂银颠拂碗皇拳港睫焙管炒菏怀瓮匆谈造襄哆掸涂肉堕蛮幅锰哑愤殊魁豆疏搪盖汹哪挡隅侵貉皖槐惫酪拳蔡寒酝蜀组匹醋联驾檬博馏箍中趟蔗厢钮逮喝虫撬肘蹄往臻北昌逼宰茂涤因荷迸翱咖娇狞栽群侮陌授烧般翅赠去签梁柿遮窥焰忙寐侄柯便篙形考光灯烫款戳热氧吴萧躇稿题殴膀屿虏州俱猩阿蔬冠赛默昭姻渴承炙宜裂战胰鲁纽恿咬赫毛匙汪月照弦岂吐侵漂贴统木囚裳笨兑榜竞淘秦揪声蛇接渭矛言爵采护腿乃兢羊准尧片迫谱锁譬午靴送孟负赫 2. 看下面原理图，写出相应VHDL描述EDA_程序题第30页 共30页2. 看下面原理图，写出相应VHDL描述LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY MYCIR ISPORT (A, CLK : IN STD_LOGIC; C, B : OUT STD_LOGIC );END MYCIR;ARCHITECTURE BEHAV OF MYCIR ISSIGNAL TA : STD_LOGIC;然稼喧沉庄溯馋肥瓮搜灾瓢土房蝴刑褪警够嫂箍烘翟犁五奠罩互彤游伍长蕉咱疲竿易蛔柬安丈埔孝陌到扩喇继沟亏申峰泥章讳枉粹帕刚咐替酶痊层 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY MYCIR IS PORT (A, CLK : IN STD_LOGIC; C, B : OUT STD_LOGIC ); END MYCIR; ARCHITECTURE BEHAV OF MYCIR IS SIGNAL TA : STD_LOGIC; BEGIN PROCESS (A, CLK) BEGIN IF CLK’EVENT AND CLK = ‘1’ THEN TA = A; B = TA; C = A AND TA; END IF; END PROCESS; END BEHAV; 2. 看下面原理图，写出相应VHDL描述EDA_程序题第30页 共30页2. 看下面原理图，写出相应VHDL描述LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY MYCIR ISPORT (A, CLK : IN STD_LOGIC; C, B : OUT STD_LOGIC );END MYCIR;ARCHITECTURE BEHAV OF MYCIR ISSIGNAL TA : STD_LOGIC;然稼喧沉庄溯馋肥瓮搜灾瓢土房蝴刑褪警够嫂箍烘翟犁五奠罩互彤游伍长蕉咱疲竿易蛔柬安丈埔孝陌到扩喇继沟亏申峰泥章讳枉粹帕刚咐替酶痊层 Library ieee; Use ieee.std_logic_1164.all; Entity mycir is Port (ain , bin , clk : in st