PayAsYouGo StorageEfficient Hard Error Correction按你所付的存储有效的错误更正.pptVIP

Pay-As-You-Go Storage-Efficient Hard Error Correction Moinuddin K. Qureshi ECE, Georgia Tech Research done while at: IBM T. J. Watson Research Center New York MICRO 2011 Dec 6, 2011 Introduction PCM is a scalable technology. Device state changed by heating. PAY-AS-YOU-GO, MICRO-2011 Over time, write operations break heater ? Cell gets stuck Reported write endurance: 10-100 million writes/cell With good wear leveling still possible to have 8+ years lifetime Not All Cells Are Created Equal PAY-AS-YOU-GO, MICRO-2011 Variability in lifetime due to process variation: weak vs. strong cells Weak cells fail much earlier ? reduce system lifetime greatly Lifetime usually modeled as Gaussian with SDEV of 10-30% of mean We use SDEV=20% of mean P (5 SDEV from mean) ≈ 10-6 For 1GB memory bank, 8K bits fail at time 0, more as we write! PCM needs significant amount of error correction to handle variability Write Efficient Code Traditional ECC codes are write intensive ? More wear Endurance related (hard) faults identified with checker read Write-efficient code: Error Correcting Pointers [ISCA’10] PAY-AS-YOU-GO, MICRO-2011 ECP needs 10 bits per entry. Handles multiple faults (needs 1 Full bit) X For correcting N errors, ECP needs (10N+1) bits 1 bit Expensive to Correct Many Errors To get 6+ years lifetime, we need to correct six errors per line Storage: 61 bits/line (about 12%, 1GB for 8GB) ? Expensive Unlike ECC in current DRAM chips, this overhead is not optional PAY-AS-YOU-GO, MICRO-2011 0 1 2 3 4 5 6 7 Baseline System Lifetime (years) Goal: Reduce storage significantly (3X-6X) while retaining lifetime Motivation Uniformly allocating error correction entries is inefficient (by ~20X) We do not need to pay for error correction of each line upfront PAY-AS-YOU-GO, MICRO-2011 Pay-As-You-Go: Give error correction entries in proportion to errors Num Writes (Normalized) No ECP used Only ECP-1 used ECP-2 to ECP-6 used Average ECP Used 50% 99.02% 0.97% 0.0