The von Neumann Model – Chapter 4冯诺依曼模型第4章.pptVIP

The von Neumann Model – Chapter 4 COMP 2620 Dr. James Money COMP 2620 * The LC-3 as a von Neumann Machine Instruction Cycle Each instruction is handled in a systematic way through a sequence of steps call the instruction cycle Each step is called a phase There are six phases to the cycle Instruction Cycle The six phases of the instruction cycle are: Fetch Decode Evaluate Address Fetch Operands Execute Store Result Instruction types There are three instruction types: Operate instruction – processes data, such as ADD Data movement instruction – moves data from one place to another, such as LDR Control instruction – alters the flow of execution in a program, such as JMP Instruction types The control instruction changes the sequence of execution in the processing unit Normally, the MAR is loaded from the PC at the beginning of processing Thus, the control instruction must affect the PC value during the EXECUTE phase We use this generate loops and branches Example: LC-3 JMP Instruction Set the PC to the value contained in a register. This becomes the address of the next instruction to fetch. “Load the contents of R3 into the PC.” Control of Instruction Cycle We’ve described the six phases, each having a number of steps For example, the FETCH instruction requires loading the MAR issuing a read memory command reading MDR - IR Recall the finite state machine is overseeing all the operations Control of Instruction Cycle Control of Instruction Cycle Remember, processing starts in state 1 The FETCH takes three clock cycles MAR is loaded with PC and PC=PC+1 Finite state machine asserts GatePC and LD.MAR PCMUX selects the +1 line and assert LD.PC signal for output MDR is loaded with instruction from memory MDR - IR Asserts GateMDR and LD.IR Control of Instruction Cycle DECODE takes one cycle in state 4 IR is used as input to for high order 4 bits(IR[15:12]) to finite state machine Execution continues until each instruction completes and the next state is set to state 1 again