电子科技大学“数字逻辑设计及应用”数字逻辑2-1.pptVIP

MOS device and CMOS Structure Chapter 2 Digital circuit design for logic unit Logic levels 1 High level 0 Low level ideal level : 1 Vcc 0 Gnd Simple logic circuits Output level can not be ideal Too much power consumptions Switch circuit Any node in circuit must get 1/0 from Vcc/Gnd by switches Switch : MOS transistor Switch : MOS transistor Switch is controlled by G through electric field;  PMOS: when G is 0, Switch on; when G is 1, Switch off; NMOS: when G is 1, Switch on; when G is 0, Switch off; Two types of MOS trans