ticomparatorbasedlowpower6-bitflashadcin0.25.docVIP

TI Comparator Based Low Power 6-bit Flash ADC in 0.25micron CMOS A.Tangel, J. Yoo, and K. Choi Abstract: This paper presents design and performance of an ultrafast System-On-Chip suitable 6-bit CMOS Flash ADC with 0.25 (m generic CMOS technology. The analog part of a traditional Flash structure is replaced by the so called threshold inverter comparator array. The resulting 6-bit ADC operates with 1GSPS, dissipates 66.87 mW of power at 2.5 V, and occupies 0.013 mm2 layout area. Introduction: Ultrafast A/D converters are needed for portable wireless devices that use the radio frequency (RF) for networking. There are primarily four different high speed ADC architectures in the literature; the full-flash, the semi-flash, the pipeline, and the foldinginterpolating ADCs. The full-flash type of ADC is the most attractive solution for being the fastest among others. However it is limited to lower resolution levels due to a large number of comparators (requiring 2n-1 comparators for an n-bit ADC). On the other hand, the pipeline ADC is more suitable for higher resolution, requiring only n-stages for an n-bit ADC [1]. The speed of an ADC is also affected by the technology used. It is clear that GaAs technology will be much more faster than the CMOS and the Bipolar [2,3,4,5]. However the current GaAs technology is not compatible with the silicon based CMOS technology, which makes it very difficult to realize the single-chip system solution. For this reason, the authors propose an ultrafast CMOS flash ADC based on the Threshold Inverter Comparator technique [6], [7],[8]. The idea is to use the digital inverter as an internally-set analog voltage comparator. This eliminates the need for high-gain differential input voltage comparators that are inherently more complex and slower than the digital inverters. It also eliminates the need of reference voltages requiring a resistor ladder circuit. Morover, it allows a complete high-speed ADC to be implemented using the sta