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Alternative implementations of two-level adaptive branch prediction.pdf

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Alternative implementations of two-level adaptive branch prediction

The th Annual International Symposium on Computer Architecture pp    May     Gold Coast Australia Alternative Implementations of TwoLevel Adaptive Branch Prediction Tse Yu Yeh and Yale N Patt Department of Electrical Engineering and Computer Science The University of Michigan Ann Arbor Michigan    Abstract As the issue rate and depth of pipelining of high perfor mance Superscalar processors increase the importance of an excellent branch predictor becomes more vital to delivering the potential performance of a wideissue deep pipelined microarchitecture We propose a new dynamic branch predictor TwoLevel Adaptive Branch Prediction that achieves substantially higher accuracy than any other scheme reported in the literature The mechanism uses two levels of branch history information to make predictions the history of the last k branches encountered and the branch behavior for the last s oc currences of the specic pattern of these k branches We have identied three variations of the TwoLevel Adap tive Branch Prediction depending on how nely we re solve the history information gathered We compute the hardware costs of implementing each of the three varia tions and use these costs in evaluating their relative ef fectiveness We measure the branch prediction accuracy of the three variations of TwoLevel Adaptive Branch Prediction along with several other popular proposed dynamic and static prediction schemes on the SPEC benchmarks We show that the average prediction ac curacy for TwoLevel Adaptive Branch Prediction is  percent while the other known schemes achieve at most  percent average prediction accuracy We measure the eectiveness of dierent prediction algorithms and dierent amounts of history and pattern information We measure the costs of each variation to obtain the same prediction accuracy  Introduction As the issue rate and depth of pipelining of high per formance Superscalar processors in

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