Limits of indirect branch prediction.pdfVIP

Limits of Indirect Branch Prediction Karel Driesen and Urs H?lzle Department of Computer Science University of California Santa Barbara, CA 93106 Technical Report TRCS97-10 June 25, 1997 Abstract. Indirect branch prediction is likely to become more important in the future because indi- rect branches tend to be more frequent in object-oriented programs. With indirect branch prediction misprediction rates of around 25% on current processors, such branches can incur a significant fraction of branch misses even though indirect branches are less frequent than the more predictable conditional branches. We investigate the predictability of indirect branches to determine whether the inferior accuracy of the current indirect branch prediction mechanism (branch target buffers) results from an intrinsic unpredictability of indirect branches or is caused by suboptimal branch prediction hardware. Using programs from the SPECint95 suite as well as a suite of C++ applica- tions, we show that prediction accuracy can exceed 95% on average for these benchmarks, assum- ing an unlimited hardware budget. This result suggests that better indirect branch prediction hard- ware can significantly outperform current branch target buffers. 1. Introduction Indirect branches, which transfer control to an address (recently) stored in a register, are hard to predict accurately. Unlike conditional branches, they can have more than two targets, so that prediction requires a full 32-bit or 64-bit address rather than just a “taken” or “not taken” bit. Furthermore, their behavior is often directly determined by data loaded from the heap, such as virtual function pointers in object-oriented programs written in languages such as C++ and Java. This behavior suggests that such indirect branches may represent a blind spot for branch prediction strategies such as two-level branch prediction, which are driven by dynamic control flow informa- tion. Indirect branches are quite common in widely used