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FunState—An Internal Design Representation for Codesign,” in
FunState—An Internal Design Representation for Codesign
L. Thiele and K. Strehl
Computer Engineering and Networks Lab (TIK)
Swiss Federal Institute of Technology (ETH)
Zurich, Switzerland
D. Ziegenbein and R. Ernst
Institute of Computer Engineering (IDA)
Technical University of Braunschweig
Braunschweig, Germany
J. Teich
Computer Engineering Lab (DATE)
University of Paderborn
Paderborn, Germany
Abstract
In this paper, an internal design model called FunState (functions
driven by state machines) is presented that enables the representation
of different types of system components and scheduling mechanisms
using a mixture of functional programming and state machines.
It is shown here how properties relevant for scheduling and ver-
ification of specification models like boolean dataflow, cyclostatic
dataflow, synchronous dataflow, marked graphs, and communicat-
ing state machines as well as Petri nets may be represented in the
FunState model. Examples of methods suited for FunState are de-
scribed, such as scheduling and verification. They are based on the
representation of the model’s state transitions in form of a periodic
graph.
1 Introduction
In the design of complex embedded systems, the specification of the
functional and timing behavior necessitates a mixture of different
basic models of computation and communication which come from
transformative or reactive domains. On the other hand, we are faced
with an increasing heterogeneity in the implementation.
This heterogeneity caused a broad range of allocation, binding,
and scheduling policies in hardware and software implementations.
Recently, a methodology has been designed to deal with the mod-
eling problem of complex embedded systems for the purpose of
scheduling [38, 39]. This model called SPI (System Property Inter-
vals) is a formal design representation internal to a design system. It
combines the representation of communicating processes with corre-
lated operation modes, the representation of non-determin
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