FunState—An Internal Design Representation for Codesign,” in.pdf

FunState—An Internal Design Representation for Codesign,” in.pdf

  1. 1、本文档共8页,可阅读全部内容。
  2. 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
  3. 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载
  4. 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
FunState—An Internal Design Representation for Codesign,” in

FunState—An Internal Design Representation for Codesign L. Thiele and K. Strehl Computer Engineering and Networks Lab (TIK) Swiss Federal Institute of Technology (ETH) Zurich, Switzerland D. Ziegenbein and R. Ernst Institute of Computer Engineering (IDA) Technical University of Braunschweig Braunschweig, Germany J. Teich Computer Engineering Lab (DATE) University of Paderborn Paderborn, Germany Abstract In this paper, an internal design model called FunState (functions driven by state machines) is presented that enables the representation of different types of system components and scheduling mechanisms using a mixture of functional programming and state machines. It is shown here how properties relevant for scheduling and ver- ification of specification models like boolean dataflow, cyclostatic dataflow, synchronous dataflow, marked graphs, and communicat- ing state machines as well as Petri nets may be represented in the FunState model. Examples of methods suited for FunState are de- scribed, such as scheduling and verification. They are based on the representation of the model’s state transitions in form of a periodic graph. 1 Introduction In the design of complex embedded systems, the specification of the functional and timing behavior necessitates a mixture of different basic models of computation and communication which come from transformative or reactive domains. On the other hand, we are faced with an increasing heterogeneity in the implementation. This heterogeneity caused a broad range of allocation, binding, and scheduling policies in hardware and software implementations. Recently, a methodology has been designed to deal with the mod- eling problem of complex embedded systems for the purpose of scheduling [38, 39]. This model called SPI (System Property Inter- vals) is a formal design representation internal to a design system. It combines the representation of communicating processes with corre- lated operation modes, the representation of non-determin

文档评论(0)

l215322 + 关注
实名认证
内容提供者

该用户很懒,什么也没介绍

1亿VIP精品文档

相关文档