January26,2004JohnKubiatowicz(http.cs.berkeley.edu~.pptVIP

January 26, 2004 John Kubiatowicz (/~kubitron) lecture slides: /~cs152/;Review: Organization;The Instruction Set: a Critical Interface;ISA Choices;Data Types;Instruction Set Architecture: What Must be Specified?;Top 10 80x86 Instructions;Operation Summary;Methods of Testing Condition;Memory Addressing;Addressing Objects: Endianess and Alignment;Addressing Modes;Addressing Mode Usage? ;MIPS I Instruction set;MIPS R3000 Instruction Set Architecture (Summary);MIPS Addressing Modes/Instruction Formats;MIPS I Operation Overview;Multiply / Divide;MIPS arithmetic instructions;MIPS logical instructions;MIPS data transfer instructions;When does MIPS sign extend?;Administrative Matters;MIPS Compare and Branch;MIPS jump, branch, compare instructions;Signed vs. Unsigned Comparison;Branch Pipelines;Delayed Branches;Filling Delayed Branches ;Miscellaneous MIPS I instructions;0 zero constant 0 1 at reserved for assembler 2 v0 expression evaluation 3 v1 function results 4 a0 arguments 5 a1 6 a2 7 a3 8 t0 temporary: caller saves . . . (callee can clobber) 15 t7;Calls: Why Are Stacks So Great?;Memory Stacks;Call-Return Linkage: Stack Frames;MIPS / GCC Calling Conventions;Logic Design: Combinational And Sequential;Finite State Machines:;“Mealey Machine”;Again: The loop of control (is there a statemachine here?);Remember The Single-Cycle Datapath?;More detail: A Single Cycle Datapath;PLA Implementation of the Main Control;Recap: An Abstract View of the Critical Path (Load);;Ultimately: It’s all about communication;Summary: Salient features of MIPS I