07级模拟集成电路原理和设计期末复习.docVIP

《模拟集成电路原理与设计》期末复习 1. Assuming all MOSFETs are in saturation, plot the small-signal model and calculate the small-signal voltage gain of the circuit in Fig. 1 (?≠0, ?=0) 2. Assuming all MOSFETs are in saturation, plot the small-signal model and calculate the small-signal voltage gain of the circuit in Fig.2 (?≠0, ?=0) 3. Design the folded-cascode op amp of Fig. 3 for the following requirements: maximum differential swing = 2.4 V, total power dissipation = 6 mW. If all of the transistors have a channel length of 0.5 ?m, what is the overall voltage gain? Can the input common-mode level be as low as zero? 4. Consider the feedback amplifier depicted in Fig. 4, where C1 and C2 set the closed-loop gain. (a) Determine the small-signal step response of the circuit. (b) Calculate the positive and negative slew rates. 5. Calculate the input impedance and the transfer function of the circuit in Fig. 5. 6. Calculate the input impedance and the transfer function of the circuit in Fig. 6 7. Assuming all MOSFETs are in saturation, calculate the input-referred 1/f noise voltage of the circuit shown in Fig. 7 8. Assuming all MOSFETs are in saturation, calculate the input-referred thermal noise voltage of the circuit shown in Fig. 8 9. Derive an expression for Iout in Fig. 9. 10. Consider the self-biased cascode shown in Fig. 10. Determine the minimum and maximum values of R?IREF such that both M1 and M2 remain in saturation. 11. For the circuit of Fig.11, determine the minimum value of ISS that guarantees oscillation. 12. Explain how the start-up circuit shown in Fig.5 operates. Derive a relationship that guarantees Vx VTH after the circuit turns on. Note: Device parameters refer to Table 2.1; ?0=8.854×10-14 Farad/cm; technology node = 0.5 ?m. 《 模拟集成电路原理与设计 》 期末复习第 1 页 共 3 页 Fig. 3 Fig. 1 Fig. 2 Fig. 6 Fig. 5 Fig. 4 Fig. 10 Fig. 9 Fig. 7 Fig. 8 Fig. 11 Fig. 12