简要回答ARM3章(国外英文资料).docVIP

简要回答ARM3章(国外英文资料) Briefly answer the following questions about the ARM instruction set. Describe the main capabilities of the ARM instruction set. Answer: conditional execution; Register access; Access to the online bucket register. Describe the usage of the program counter PC, connection register lr, stack pointer sp, CPSR and SPSR. Answer: LR: register r14 is used as a subroutine connection register. When a branch and the connection instruction (BL) is executed, the register r14 receives a copy of r15. At other times, r14 can be viewed as a general-purpose register. PC: under ARM, the bit [1:0] of r15 is undefined and must be ignored, while the r15 bit [31:2] contains the program value. Under Thumb, the r15 bit [0] is undefined and must be ignored, while the r15 bit [31:1] contains the program value. The CPSR and the SPSR are the same as the CPSR and SPSR of the ARM state; SP maps to the r133 in ARM state. Describe how the processor switches from ARM state to Thumb state. Answer: branch and transition state directives BX, appointed a Rn in the instruction register, copy the Rn content to PC, at the same time make the PC [0] = 0, if an Rn [0] = 1, transform processor state into Thumb state, interpreted the target address code as a Thumb code. How does the ARM command operate on the number of unsigned Numbers, with symbols loaded in bytes or half words to register? A: the LDRSB directive loads a byte of data from memory into the register bit [7:0], and expands the bit [31:8] with the symbol bit [7]. The LDRSH instruction loads half bytes from the memory to the register bit [15:0], extending the bit [31:16] with the symbol bit [15]. Describe how the ARM instruction is implemented. Answer: all of the ARM instruction can be in zero zero opcode mnemonics, follow a condition code mnemonic suffix, conditions, please sign in a CPSR, conditional execution, and do not need to use the branch instruction implement conditional branches. Under what circumstances do ARM data pro