ISE中常见WARNING和ERROR及其解决方法.pdfVIP

1.WARNING:Route:455 - CLK Net:trn_clk_OBUF may have excessive skew because 0 CLK pins and 1 NON_CLK pins failed to route using a CLK template. Solution This message informs the user that some loads on the clock net are not clock pins. Therefore, the clock template that is normally used to connect clock pins will not be used to connect the loads. A different routing that involves local routing will be used, potentially inducing some skew on the clock net. Opening your design in FPGA EDITOR will allow you to see what loads are connected to the clock net, and the cause of the warni