eda设计.doc

EDA技术课程设计 ——多功能数字钟 专业： 通信c132 姓名： 苏莹洁138245 史晓威138241 指导老师： 安亚军 时间： 2015.12.26 目录 1、设计目的·····················································3 2、设计系统环境·················································3 3、设计性能指标及功能···········································3 3.1设计功能···················································3 3.2性能指标···················································3 4、设计总体框图·················································3 5、底层文件设计··················································4 5.1秒计数器····················································4 5.2分钟计数器··················································4 5.3小时计数器··················································5 5.4整点报时驱动信号产生模块····································5 5.5驱动8位八段共阴扫描数码管的片选驱动信号输出模块··································································6 5.6驱动八段字形译码输出模块·····································6 6、顶层文件设计················································6 7、心得体会······················································7 附录（源程序）·····················································8 1、设计目的 掌握各类计数器和分频器以及它们相连的设计方法；掌握多个数码管的原理与方法；掌握CPLD技术的层次化设计的方法；掌握使用VHDL语言的设计思想；对整个系统的设计有一个了解。（1）一台PC机；（2）一套GW48型EDA实验开发系统硬件；（3）X+PLUS 集成化的开发系统硬件。1）时钟计数：完成时、分、秒的正确计时并且显示所计的数字；对秒、分 ——60进制计数，即从0到59循环计数，时钟——24进制计数，即从0到23循环计数，并且在数码管上显示数值。 2）时间设置：手动调节分钟、小时，可以对所设计的时钟任意调时间，这样使数字钟真正具有使用功能。我们可以通过实验板上的键7和键4进行任意的调整，因为我们用的时钟信号均是1HZ的，所以每LED灯变化一次就来一个脉冲，即计数一次。 3）清零功能：reset为复位键，低电平时实现清零功能，高电平时正常计数。可以根据我们自己任意时间的复位。 4）蜂鸣器在整点时有报时信号产生，蜂鸣器报警。产生“滴答.滴答”的报警声音。 5）LED灯在时钟显示时有花样显示信号产生。即根据进位情况，LED不停的闪烁，从而产生“花样”信号。 4、设计总体框图 根据总体方框图及各部分分配的功能可知，本系统可以由秒计数器、分钟计数器、小时计数器、整点报时、分的调整以及小时的调整和一个顶层文件构成。采用自顶向下的设计方法，子模块利用VHDL语言设计，顶层文件用原理图的设计方法。显示：小时采用24进制，而分钟均是采用6进制和10进制的组合。 5、模块及模块功能 多功能数字钟中的时钟记数模块、驱动8位八段共阴扫描数码管的片选驱动信号输出模块、驱动八段字形译码输出模块、整点报时驱动信号产生模块。 5.1秒计数器 5.1.1 VHDL语言描述程序见附录 ?模块CNT60_2 该模块为60进制计数